1. Field of the Invention
The present invention relates to a semiconductor wafer, and especially a method for fabrication of a single crystal silicon wafer.
2. Description of the Related Art
Generally, a conventional method for fabricating a semiconductor wafer comprises a slicing step to obtain wafers of a thin disc shape by slicing a single crystal silicon ingot pulled with a single crystal pulling apparatus; a coarse chamfering step to chamfer a peripheral edge portion of the sliced wafer in order to prevent cracking or breakage of the wafer; a lapping step to flatten both of the front surface and the back surface of the chamfered wafer; a cleaning or etching step to remove a remaining mechanical damage layer formed by the chamfering step and lapping step; and a mirror-polishing step to mirror-polish the front surface of the etched wafer. As shown in FIG. 1 [B], adding to these steps, there can be conducted by combination of a step of surface-grinding the front surface or the both surfaces of the wafer, a double side polishing step for polishing both surfaces of the surface-ground wafer, a finishing chamfering step to mirror-polish a peripheral edge portion of the wafer before and after the double side polishing step, the finishing polishing step to mirror-polish the wafer subjected to the double side polishing, and a cleaning step for removing a polishing agent remaining on the polished wafer and contaminant in order to improve cleanness.
In the above-mentioned method for fabrication, the surface-grinding step has been introduced to support the lapping process, since high flatness of the wafer cannot be achieved only by the lapping process when a diameter of the wafer is large, especially more than 300 mm.
However, in the surface-ground wafer, grinding striations (streaks) remain as observed with a magic mirror, even after it is polished in a considerable amount. Furthermore, if it is polished in a considerable amount, the wafer may lose its proper shape, and flatness thereof is degraded.
For example, grinding striations formed at the most peripheral portion during surface-grinding of the front surface or the both surfaces of the wafer have a P-V value of about 0.2 to 0.1 xcexcm and a striation interval of about 1 to 10 mm. Accordingly, the shape of the polishing cloth is copied (followed) to the shape of the grinding striations when it -is subjected to double side polishing, so that grinding striations remain as micro roughness having a P-V value of about 30 to 50 nm, even after a finishing mirror-polishing step.
In the case of the wafer having high flatness wherein both surfaces are subjected to mirror-polishing, flatness on the back surface is too good, which may easily cause problems in a device process, such as indistinguishability of the front surface from the back surface, necessity of re-adjustment of sensing sensitivity, difficulty of chucking and releasing the wafer, and liabilities in a conveying line such as contamination.
The present invention has been accomplished to solve the above-mentioned conventional problems, and an object of the invention is to eliminate the grinding striations which remain on the front surface even when double side polishing and front surface finishing mirror-polishing are conducted after the above-mentioned conventional step of surface-grinding of the front surface or the both surfaces, to improve the quality of the front surface of the wafer, and to provide the semiconductor wafer having a proper quality in the back surface suitable for the device process, and a method for fabricating it.
To achieve the above-mentioned object, the present invention provides a semiconductor wafer obtained, at least, by removing a mechanical damage layer by etching both surfaces of the wafer, flattening one of the surfaces by a surface-grinding means, polishing both of the surfaces, and then subjecting a front surface of the wafer to a finishing mirror-polishing when defining the surface subjected to surface-grinding as a back surface of the wafer.
The wafer is excellent in flatness on both surfaces, and condition of the surfaces is different from each other. For example, the front surface is finished to be a mirror surface having no micro roughness formed during surface-grinding, and the back surface is finished to be a surface on which micro roughness (P-V value=about 30 to 50 nm, interval=about 1 to 10 mm) remains as grinding striations.
When the wafer of the present invention is used, there are no grinding striations remaining on the front surface which are formed in the case of the conventional wafer fabricated by conducting lapping of the both surfaces, surface-grinding of the front surface or the both surfaces, double side polishing, and mirror-polishing. Furthermore, when the wafer of the present invention is chucked at the back surface thereof, there are no problems, which may be easily caused in a device process because of too good flatness of the back surface, such as indistinguishability of the front surface from the back surface, necessity of re-adjustment of sensing sensitivity, difficulty of chucking and releasing the wafer, and liabilities in a conveying line such as contamination. Furthermore, the grinding striations on the back surface are never transferred on the front surface in fabrication of the wafer of the present invention. Accordingly, it can be used in a process of highly integrated devices, productivity and yield of a device can be improved, and cost can be significantly reduced.
The present invention also provides a method for fabricating a semiconductor wafer comprising at least slicing a wafer from a semiconductor ingot, lapping both surfaces of the wafer, removing a mechanical damage layer by etching treatment, flattening one of the surfaces by a surface-grinding means, polishing both of the surfaces, and then subjecting a front surface of the wafer to a finishing mirror-polishing when defining the surface subjected to surface-grinding as a back surface of the wafer.
According to the above-mentioned method comprising the double side lapping step, the single side surface-grinding step, the double side polishing step and the step of subjecting the other surface than the above ground surface to a finishing mirror-polishing, a wafer having high flatness can be easily fabricated at low cost, as compared with the conventional method comprising a double side lapping step, a step of grinding a front surface or both surfaces, a double side polishing step and a mirror-polishing step. Furthermore, a problem of grinding striations remaining on the surface, which is one of disadvantages in the conventional method, can be solved, and a wafer having a front surface comprising a mirror surface without grinding striations and micro roughness and a back surface with desired grinding striations, can be fabricated easily and at low cost.
In this case, it is preferable to conduct mirror edge polishing before or after polishing both of the surfaces described above.
When the mirror edge polishing (mirror-polishing on chamfered edge) is conducted before or after the double side polishing step, defects such as cracking or breakage of the wafer can be prevented during polishing or in a device process. The mirror edge polishing is more effective, since it is conducted after the peripheral edge portion of the wafer is ground for coarse chamfering before the lapping step in order to prevent cracking or breakage of the wafer or the like during lapping and a surface-grinding.
It is preferable to etch the wafer by a wet etching method using an alkali solution as a etching solution.
Thereby, it is possible to remove a mechanical damage layer of the wafer, maintaining flatness achieved by the double side lapping step, and to conduct a polishing step effectively with maintaining high flatness, in cooperation with the following single side grinding. A stock removal of the wafer in the etching treatment can be minimal for removing the mechanical damage layer.
As described above, according to the present invention, a semiconductor wafer having the front surface which is a mirror surface with high flatness and high brightness and without micro roughness and the back surface having appropriate fine grinding striations can be fabricated easily and at low cost. Accordingly, when the wafer is chucked in a device process, the grinding striations on the back surface are never transferred on the front surface of the wafer of the present invention, and it can be used in a process of highly integrated devices, productivity and yield of a device can be improved in a device process, and cost can be significantly reduced.